Clock/connection interface

This clock/connection interface board (see Figs. 8.1 and 8.2, and Tables 8.1 and 8.2) is used to select the master clock signal, and to provide a connection point for cables from all boards.

Figure 8.1: Functional diagram of the clock/connection interface board. This board is used to select the master clock signal, and to provide a connection path for all boards.

Figure 8.2: Layout of connectors on the clock/connection interface board.

Table 8.1: Description of connectors J1-J14 on the clock-connect interface board. The connector parts are for right angle printed circuit board connectors.

Conn.	Type (connector part)	Description
J1	50 pin ribbon (Newark 46F4723, 3M 2550-5002UB)	6503E digital control bits
J2	50 pin ribbon (Newark 46F4723, 3M 2550-5002UB)	ACC-14D J15, board 1
J3	50 pin ribbon (Newark 46F4723, 3M 2550-5002UB)	ACC-14D J15, board 2
J4	SCSI-2 68 pin (NI 777600-01, Amp 2-174225-5)	6534 streaming digital output
J5	SCSI-2 68 pin (NI 777600-01, Amp 2-174225-5)	6052E multifunction
J6	9 pin D female (Newark 93F8890, Cannon M24308/23-31)	Motor step inputs from MM3000 #1 (see Table 10.4)
J7	9 pin D female (Newark 93F8890, Cannon M24308/23-31)	Motor step inputs from MM3000 #2 (see Table 10.4)
J8	LEMO female (EPL.00.250.NTN)	SGM pulses in
J9	LEMO female (EPL.00.250.NTN)	ALT1 pulses in
J10	LEMO female (EPL.00.250.NTN)	ALT2 pulses in
J11	LEMO female (EPL.00.250.NTN)	Master Clock to Trigger In of Quantum Composers
J12	LEMO female (EPL.00.250.NTN)	Master Clock output
J13	LEMO female (EPL.00.250.NTN)	Master Clock output
J14	LEMO female (EPL.00.250.NTN)	Master Clock output

Table 8.2: Description of connectors J15-J24 on the clock-connect interface board. The connector parts are for right angle printed circuit board connectors.

Conn.	Type (connector part)	Description
J15	LEMO female (EPL.00.250.NTN)	From AQ output of Quantum Composers to 6052E GPCTR0_GATE (pin 3 vs. DGGND pin 4). Desired input impedance is 50 $\Omega$.
J16	LEMO female (EPL.00.250.NTN)	6052E GPCTR1_SOURCE (pin 42 vs. DGGND pin 7). X-ray counter input. Desired input impedance is 50 $\Omega$.
J17	25 pin D male (Newark 93F8895, Cannon M24308/24-33)	Analog signals from x-ray detector (see Table 8.4)
J18	BNC female (AMP/Tyco 226990-2)	6052E ACH14 analog input (pin 58 vs. AIGND pin 24)
J19	BNC female (AMP/Tyco 226990-2)	6052E ACH15 analog input (pin 23 vs. AIGND pin 24)
J20	LEMO female (EPL.00.250.NTN)	6052E STARTSCAN output (pin 38 vs. DGGND pin 4)
J21	BNC female (AMP/Tyco 226990-2)	6052E DAC1OUT (pin 21 vs. AOGND pin 55)
J22	BNC female (AMP/Tyco 226990-2)	6052E DAC0OUT (pin 22 vs. AOGND pin 55)
J23	Internally on board	Input from power supply
J24	LEMO female (EPL.00.250.NTN)	6503E digital control bit A6 (for shutter control)

Table 8.3: Pinouts for connector J1 from the NI PCI-6503 digital output board to the clock-connection interface board. All even pins (2-50) are tied to ground. No connection is made to pin 49 (a +5V source from the PCI-6503).

6503 pin	Description	6503 pin	Description	6503 pin	Description
47 (PA0)	Multiplexer 1 select bit 0	31 (PB0)	Clock divider divide bit 0	15 (PC0)	Not yet assigned
45 (PA1)	Multiplexer 1 select bit 1	29 (PB1)	Clock divider divide bit 1	13 (PC1)	Not yet assigned
43 (PA2)	Multiplexer 1 select bit 2	27 (PB2)	Clock divider divide bit 2	11 (PC2)	Not yet assigned
41 (PA3)	Multiplexer 2 select bit 0	25 (PB3)	Clock divider divide bit 3	9 (PC3)	Not yet assigned
39 (PA4)	Multiplexer 2 select bit 1	23 (PB4)	Clock divider divide bit 4	7 (PC4)	Not yet assigned
37 (PA5)	Clock divider reset bit	21 (PB5)	Clock divider divide bit 5	5 (PC5)	Not yet assigned
35 (PA6)	Shutter bit	19 (PB6)	Clock divider divide bit 6	3 (PC6)	Not yet assigned
33 (PA7)	(Helium bit - added belatedly)	17 (PB7)	Clock divider divide bit 7	1 (PC7)	Not yet assigned